Pero es que al final, la he localizado en el fabricante.
Otra cosilla.
Con el programa que me comentaste hice un informe del sistema y me dice esto que no entiendo pero seguro que tu vas de vuelta. A ver si me ayudas a entenderlo porque yo creia que tenía bien las memorias.
Este es el informe:
Chipset
Model : VIA ProSavageDDR P4X333 CPU to PCI Bridge
Front Side Bus Speed : 4x 133MHz (532MHz)
Total Memory : 2GB DDR
Memory Bus Speed : 2x 166MHz (332MHz)
Ram:
Memory Module(s)
Memory Module : Kingston K 1GB DDR PC3200U DDR-200 (3-3-3-8 2-11-0-0)
Memory Module : Kingston K 1GB DDR PC3200U DDR-200 (3-3-3-8 2-11-0-0)
(aquí se lee DDR200 y en las cajas de las tiras pone DDR 400, no entiendo porque)
Y cuando acaba el informe del sistema dice esto bajo una señal de Advertencia:
T100
Advertencia 1: Large memory systems (1GB or greater) should use Registered/Buffered memory, especially if more than 2 are installed on the same channel. This improves signal quality by reducing the load on the chipset channel. While these modules add an extra clock delay due to the on-board buffers (thus CL2 effectively becomes CL3), the stability will be worth it. Server chipsets with many memory slots generally require Registered memory.
Fix: If you plan on adding more memory, consider replacing the modules with Registered/Buffered modules. Do note that you cannot mix Unbuffered and Registered/Buffered modules on the same channel, but you may be able to if the chipset has multiple memory channels.
T2546
Advertencia 2: Large memory modules (512 or greater) should be ECC/Parity. Since the probability that a bit will be corrupt is the same or increases with module density, the bigger the module, the bigger the overall probability that you will get one or more corrupted bits. While these modules add an extra delay on partial writes (e.g. less than data width) as parity for the whole line must be re-calculated, the stability will be worth it.
Fix: If you plan on adding more memory, consider replacing the modules with ECC/Parity modules. Do note that running plain and ECC/Parity modules will turn off ECC/Parity for the whole memory array.
Y la duda es: ¿a la vista de esto, tengo mal las memorias, es que yo no les veo que lo de Buffered ni lo de Parity esté mal?
A ver que me dices maestro y perdona el tostón.
Antes de hacer cualquier cambio aplica primero el UCS (universal common sense)
